The present disclosure relates in general to semiconductor fabrication and, more particularly, to an apparatus and a method for controlling plasma etching of a workpiece.
In integrated circuit (IC) manufacturing technology, a photoresist layer is typically applied to a semiconductor wafer surface, followed by exposure of the resist through a mask. A post-exposure baking process and a developing process are then performed to form a patterned resist layer with openings. After verification that the resist is within fabrication specifications, the wafer is etched to remove portions of the wafer exposed through the openings. Following etching of the wafer, the resist layer is stripped.
Dry etching is one etching technique that is used to remove portions of the wafer exposed through the openings of the resist layer. One exemplary dry etching technique is known as plasma etching. Plasma etching is often a preferred etching technique as it is generally faster, more selective, and less prone to radiation than other etching techniques. Plasma etching is also an isotropic etching technique and can be generally characterized by the following steps: 1) generation of reactive species from a relatively inert molecular gas; 2) diffusion of the reactive species to the surface of the wafer or other workpiece; 3) adsorption of the species on the surface of the wafer; 4) chemical reaction between the reactive species and the wafer surface yielding a volatile byproduct; 5) desorption of the byproduct; and 6) removal of the desorbed species. In short, a plasma (defined as a partially ionized gas composed of ions, electrons, and neutral species) is transported to and reacts with a surface of a wafer or other target. That reaction creates a byproduct that is removed thereby yielding an etched surface of the wafer. Plasma etching is often used for fine-line pattern definition, selective processing over topography, planarization, and resist stripping.
One manner of controlling the plasma etch process is through plasma flow distribution. For example, in conventional plasma etching chambers, a single sieve filter is positioned between the plasma source and the wafer to be plasma etched. The sieve filter generally has uniformly shaped and sized openings spaced from one another. Plasma is distributed uniformly across the surface of the wafer. Some plasma filters have been designed with non-uniformity in the size, shape, and density of the openings to non-uniformly control the distribution of the plasma. In this regard, different filters can be used to effectuate different etching profiles. For example, for radial global critical dimension uniformity (GCDU) error compensation, the sieve filter is constructed to have openings spaced radially about a larger central opening. For side-side GCDU error compensation, a sieve filter with a central opening sized to match all but one of a series of radially spaced openings will be used. The one radially spaced opening has a larger diameter than the other sieve filter openings.
Because conventional sieve filters are relatively easy to manufacture, sieve filters with different opening configurations (size, shape, and density) have been made to account for various plasma etching applications. Notwithstanding the numerous advantages of these filters; however, there is still a need to improve the flexibility of plasma flow control. That is, with conventional sieve filters, a trial-and-error approach is often required to determine the most appropriate opening configuration. Moreover, because the openings are of fixed size, if a change in plasma flow distribution is desired during a particular recipe, the sieve filter must be replaced.
Although the existing technologies have been generally adequate for their intended purposes, they have not been satisfactory in all respects.